Recently, to realize a big high-resolution liquid crystal display, a high-speed high-resolution close-contact image sensor, a three-dimensional IC and so on, people have tried to fabricate a high-performance semiconductor component on an insulating substrate of glass, for example.
To make such a semiconductor component, a thin-film semiconductor layer needs to be formed. Thus, techniques of fabricating a semiconductor component on an insulating substrate using either a semiconductor thin film of an amorphous silicon (a-Si) semiconductor or a semiconductor thin film of a crystalline silicon semiconductor such as polysilicon or microcrystalline silicon are known in the art.
The amorphous silicon semiconductor thin film can be formed at a relatively low temperature by a vapor phase process, and therefore, is mass-producible and generally used most commonly. However, the amorphous silicon semiconductor thin film has inferior physical properties in terms of conductivity, for example. That is why if a device of any of those various types requires high-performance semiconductor components, the amorphous silicon semiconductor thin film cannot be used effectively for that purpose.
Meanwhile, the crystalline silicon semiconductor thin film has superior conductivity and has been the object of numerous researches and developments to use the film in those devices. Following methods of making a thin-film crystalline silicon semiconductor are known:                (1) directly form a silicon semiconductor film with crystallinity during its film deposition process;        (2) form an amorphous silicon semiconductor film once and then expose it to intense light, thereby crystallizing the amorphous silicon with its energy; and        (3) form an amorphous silicon semiconductor film once and then apply thermal energy to it, thereby crystallizing the amorphous silicon.        
According to the method (1), silicon is crystallized as the film deposition process proceeds. That is why unless the film being deposited is sufficiently thick, crystalline silicon with a large crystal grain size will not be obtained. Consequently, according to this method, it is technically difficult to form a crystalline silicon semiconductor thin film with good semiconductor properties over the entire surface of a substrate with a broad area. On top of that, since the film needs to be deposited at a temperature of 600° C. or more, an inexpensive glass substrate with a low softening point cannot be used as an insulating substrate to raise the manufacturing cost unintentionally.
(2) According to the method (2), a crystallization phenomenon during a melting and solidifying process is utilized, and therefore, high-quality crystalline silicon semiconductor with a small crystal grain size but a well processed grain boundary can be obtained. However, a practical means for irradiating a substrate with a broad area with such intense light is rare to find. For example, when an excimer laser, which is currently used most commonly, is used, the laser beam does not have so good stability as to process the entire surface of a substrate with a broad area uniformly. Thus, it is hard to obtain a crystalline silicon film according to this method, too. Consequently, it is difficult to fabricate a plurality of semiconductor components with uniform characteristics over the same substrate. What is worse, since the laser beam cannot cover the broad area, the productivity is bad.
Compared to the methods (1) and (2), the method (3) is advantageous in that a crystalline silicon semiconductor film can be deposited over a broad area relatively easily. However, to complete the crystallization, a heat treatment must be conducted at as high a temperature as 600° C. or more for several tens of hours. Accordingly, if the heating temperature is lowered to use an inexpensive glass substrate, the heat treatment needs to be carried out for even a longer time, thus decreasing the throughput. Also, since a solid phase crystallization phenomenon is utilized according to this method, the crystal grains will grow parallel to the substrate plane and their crystal grain sizes may sometimes reach several μm. However, since a grain boundary is formed as a result of contact between grown crystal grains, the grain boundary serves as a trap level against carriers, which may cause a decrease in electron mobility.
Among these three methods, people are paying particularly much attention to the method (3) as one of most promising methods. Thus, a method of forming a high-quality, highly uniform crystalline silicon film by carrying out a heat treatment at a low temperature and in a short time by utilizing the method (3) is disclosed in Japanese Patent Application Laid-Open Publications Nos. 6-333824, 6-333825 and 8-330602, for example.
According to the method disclosed in these patent documents, it would be possible to complete the crystallization at as low a temperature as 600° C. or less and in a processing time of about a few hours by thermally treating an amorphous silicon film with a very small amount of nickel or any other metallic element introduced through the surface of the amorphous silicon film.
In this method, first, nuclei of crystals are generated from the introduced metallic element at an early stage of the heat treatment process, and then the metallic element functions as a catalyst for promoting the crystal growth of silicon, thus advancing the crystallization rapidly. That is why the metallic element introduced is called a “catalyst element”. A silicon film that has been crystallized by a normal solid phase growth process has a twin crystal structure, whereas a crystalline silicon film, obtained by this method, consists of a great many columnar crystals. And the inside of each of those columnar crystals almost has a single crystal state.
According to this method, however, if the catalyst element remained in the silicon film, then normal semiconductor component characteristics would not be achieved. For that reason, as disclosed in Japanese Patent Application Laid-Open Publication No. 6-333824 or No. 8-236471, the catalyst element is trapped using phosphorus ions, for example. More specifically, after a crystalline silicon film, obtained by a heat treatment using a catalyst element introduced, has been patterned, a gate insulating film is deposited on the surface of the crystalline silicon film and then a gate electrode is formed thereon. Then, the patterned crystalline silicon film is doped with phosphorus ions using the gate electrode as a mask. As a result, portions of the crystalline silicon film (i.e., source/drain regions), except the region right under the gate electrode, are doped with phosphorus. Thereafter, the phosphorus ions introduced are activated with either thermal energy or laser light. As a result, the catalyst element that has been located in the region right under the gate electrode are trapped (i.e., gettered) in the source/drain regions, and a thin-film transistor, using the region right under the gate electrode as a channel region, can be obtained.
The phosphorus ion doping process needs to be carried out on a crystalline silicon film with a broad area. For that purpose, an ion beam system that can emit an ion beam with a large cross section is used. To generate a lot of ions and to form an ion beam with a broad cross section, such an ion beam system uses diborane and phosphine as source gases, generates an ion beam by getting these gases decomposed by an ion source, and then irradiates a crystalline silicon film with that ion beam without passing the beam through a mass separator. In this case, the conventional ion beam system is controlled such that the ion beam has a constant beam current density and the crystalline silicon film is doped with the ions.
When such a control is carried out, however, the quantity of charge per unit area of the doping ions becomes constant but the species of the ions generated is variable. The properties of a semiconductor doped change according to the ion species. That is why if semiconductor components are fabricated by getting a crystalline silicon film doped with ions by a conventional ion beam system, then the characteristics of the semiconductor components will vary significantly. In addition, due to such a significant variation in characteristics, the yield of semiconductor devices that satisfy a predetermined standard decreases, too.